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以人工神经网络为代表的机器学习算法目前已得到日益广泛的应用。当前主流的现场可编程逻辑门阵列(FPGA)芯片拥有丰富的逻辑资源与高速数据接口,并内置大量硬件乘法器等计算单元。相比基于CPU、GPU软件部署的复杂算法模型,利用FPGA可实现中小规模神经网络的硬件化部署,且具有低功耗、低延迟和高吞吐率等优势。近年来出现的高层次综合(High-Level Synthesis,HLS)技术,能够将采用高级编程语言编写的软件程序编译为数字逻辑电路描述,为神经网络算法的FPGA加速提供了便捷的手段。本文介绍了利用一款HLS工具——hls4ml实现神经网络算法编译综合、模型优化及FPGA部署的流程。同时围绕超级陶粲装置(STCF)触发系统关键技术预研中的主漂移室(MDC)三维径迹z向顶点重建需求,介绍了基于hls4ml的神经网络算法设计优化及FPGA加速的具体步骤。测试结果表明,该方法能够有效提升触发系统的实时处理能力,在保证算法精度的同时,显著降低了资源利用率,使神经网络的轻量化硬件部署成为现实。本文的研究为机器学习算法在大型粒子物理实验触发系统中的FPGA加速提供了参考范例。
Abstract：Machine learning algorithms,represented by artificial neural networks,have found increasingly wide applications.Modern FPGA(Field Programmable Gate Array) devices provide abundant logic resources,high-speed data interfaces,and a large number of hardware multipliers,making them well-suited for hardware deployment(i.e.,algorithm acceleration) of small and mediumscale neural networks in nuclear electronics.Compared with CPU-and GPU-based software implementations,FPGA deployment offers advantages in power efficiency,latency,and throughput.The emerging high-level synthesis(HLS) technology enables the conversion of high-level software programs into digital circuit descriptions,providing an efficient path for deploying neural networks on FPGAs.This paper presents the implementation process of compiling neural networks using hls4ml,an HLS tool,including model optimization and FPGA deployment.Focusing on the z-vertex reconstruction task in the MDC(Main Drift Chamber) of the trigger system in the Super Tau-Charm Facility(STCF) pre-research,we detail the algorithm design,optimization,and hardware deployment procedures using hls4ml.Experimental results show that the hls4ml-based neural network acceleration method can effectively enhance the real-time processing capability of the trigger system while maintaining algorithm accuracy,and significantly reduce resource utilization,enabling lightweight hardware deployment of neural networks.This study provides a reference case for FPGA acceleration of machine learning algorithms in large-scale particle physics experiments trigger systems.
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(1)该精度未设置更高以排除更多的本底是因为考虑到了离线物理分析要求保留所有|z|<10 cm的径迹，以便分析次级顶点。
基本信息:
DOI：10.20173/j.cnki.ned.20260127.001
中图分类号:O572.2;TN791;TP181
引用信息:
[1]周子煊,郝艺迪,封常青,等.基于HLS的机器学习FPGA加速及其在STCF触发系统预研中的初步应用[J].核电子学与探测技术,2026,46(03):297-308.DOI:10.20173/j.cnki.ned.20260127.001.
基金信息:
国家自然科学基金资助（项目编号：12341503）